Method for forming deep trench isolation for RF devices on SOI
US9349748B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 8, 2014 |
| Grant date | May 24, 2016 |
| Priority date | — |
| Expiry date | Dec 8, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/201
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes a silicon-on-insulator (SOI) substrate having a stack of a first semiconductor substrate, a buried insulating layer and a second semiconductor substrate formed in a first region and a deep trench isolation disposed in a second region. The method of forming the semiconductor device includes providing a SOI substrate having shallow trench isolations (STIs) and transistors formed within and on the second semiconductor substrate, respectively. The method also includes forming a hard mask over the first region and removing the STIs, the transistors, the second semiconductor substrate and the buried insulating layer in the second region using the hard mask as a mask, and forming a capping layer covering the deep trench isolation and the second semiconductor substrate including the transistors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.