Semiconductor structure with airgap
US9349793B2 · kind B2 · utility
32Cited by
8References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 8, 2014 |
| Grant date | May 24, 2016 |
| Priority date | — |
| Expiry date | Sep 8, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/02255
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A field effect transistor (FET) with an underlying airgap and methods of manufacture are disclosed. The method includes forming an amorphous layer at a predetermined depth of a substrate. The method further includes forming an airgap in the substrate under the amorphous layer. The method further includes forming a completely isolated transistor in an active region of the substrate, above the amorphous layer and the airgap.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.