Resistance variable memory structure and method of forming the same
US9349953B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 16, 2013 |
| Grant date | May 24, 2016 |
| Priority date | — |
| Expiry date | May 28, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C14/0045
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor structure includes a memory region. A memory structure is disposed on the memory region. The memory structure includes a first electrode, a resistance variable layer, protection spacers and a second electrode. The first electrode has a top surface and a first outer sidewall surface on the memory region. The resistance variable layer has a first portion and a second portion. The first portion is disposed over the top surface of the first electrode and the second portion extends upwardly from the first portion. The protection spacers are disposed over a portion of the top surface of the first electrode and surround the second portion of the resistance variable layer. The protection spacers are configurable to protect at least one conductive path in the resistance variable layer. The protection spacers have a second outer sidewall surface substantially aligned with the first outer sidewall surface of the first electrode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.