Patent · US Active

Modular and scalable cyclic redundancy check computation circuit

US9350385B2 · kind B2 · utility

1Cited by
6References
19Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMar 15, 2013
Grant dateMay 24, 2016
Priority date
Expiry dateMay 28, 2034

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03M13/091
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

Devices and methods for performing a cyclic redundancy check are disclosed. For example, a device has a splitter for splitting a data word into a plurality of paths. The device also has a plurality of cyclic redundancy check units. Each of the units is for processing a respective one of the paths. In addition, each of the units includes a first output port for outputting a cyclic redundancy check value for a packet ending within the unit and a second output port for outputting a cyclic redundancy check value for a packet starting or ongoing within the unit.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.