Method of trimming current source using on-chip ADC
US9353017B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 17, 2014 |
| Grant date | May 31, 2016 |
| Priority date | — |
| Expiry date | Nov 6, 2034 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02P20/145
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A method of trimming a current source in an IC includes deriving a reference voltage from an external supply, and developing a measurement voltage across an external reference resistance receiving the current to be trimmed. An on-chip ADC is used to provide corresponding digital reference and digital measurement signals. A digital comparator compares the digital signals and provides a digital trim signal, which is used to adjust the current to be trimmed until the digital measurement signal is equal to the digital reference signal within an acceptable tolerance. Gain and offset errors in the ADC cancel and do not affect the calibration of the trim operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.