Enhanced loop streaming detector to drive logic optimization

US9354875B2 · kind B2 · utility

Assignee

• Intel Corporation · US

Inventors

• Matthew C. Merten · Hillsboro, US
• Justin M. Deinlein · Portland, US
• Yury N. Ilin · Beaverton, US
• Alexandre J. Farcy · Hillsboro, US
• Tong Li · Pine Brook, US
• Srikanth Srinivasan · Bengaluru, IN

Key dates

• Filing date: Dec 27, 2012
• Grant date: May 31, 2016
• Expiry date: Nov 16, 2034

Classification

• Technology area (CPC Y): Emerging Cross-Sectional Technologies
• CPC primary: Y02D10/00
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

An enhanced loop streaming detection mechanism is provided in a processor to reduce power consumption. The processor includes a decoder to decode instructions in a loop into micro-operations, and a loop streaming detector to detect the presence of the loop in the micro-operations. The processor also includes a loop characteristic tracker unit to identify hardware components downstream from the decoder that are not to be used by the micro-operations in the loop, and to disable the identified hardware components. The processor also includes execution circuitry to execute the micro-operations in the loop with the identified hardware components disabled.