Unified tool for automatic design constraints generation and verification
US9355211B2 · kind B2 · utility
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12References
20Claims
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Key dates
| Filing date | Oct 10, 2014 |
| Grant date | May 31, 2016 |
| Priority date | — |
| Expiry date | Oct 10, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2111/04
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Systems, methods, and other embodiments associated with providing a unified tool for performing design constraints generation and verification for circuit designs are described. In one embodiment, the unified tool reads design data and design intent information for a circuit design. The unified tool generates physical flow elements and verification flow elements of the circuit design, together and in dependence on each other, based, at least in part, on the design data and the design intent information.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.