Circuits for and methods of implementing a dual-mode oscillator
US9356556B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 6, 2015 |
| Grant date | May 31, 2016 |
| Priority date | — |
| Expiry date | Aug 6, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03B2200/0078
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A circuit for implementing a dual-mode oscillator is disclosed. The circuit comprises a first oscillator portion having a first inductor coupled in parallel with a first capacitor between a first node and a second node; a first pair of output nodes coupled to the first and second nodes; a second oscillator portion inductively coupled to the first oscillator portion, the second oscillator portion having a second inductor coupled in parallel with a second capacitor between a third node and a fourth node; a second pair of output nodes coupled to the third and fourth nodes; and a control circuit coupled to enable a supply of current to either the first oscillator portion or the second oscillator portion. A method of implementing a dual-mode oscillator is also disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.