Clock data recovery (CDR) phase walk scheme in a phase-interpolater-based transceiver system
US9356775B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 9, 2015 |
| Grant date | May 31, 2016 |
| Priority date | — |
| Expiry date | Jul 9, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L7/0337
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Methods and apparatus are described for synchronously stepping at least one of a data phase interpolator (PI) code or a crossing PI code in a clock and data recovery (CDR) circuit until one or more preset criteria are satisfied. One example method generally includes determining that a condition has been met; based on the determination, stepping, in a CDR circuit, at least one of a data PI code or a crossing PI code for each cycle of a clock; stopping the stepping based on one or more criteria to generate a predetermined state of the data PI code and the crossing PI code, wherein the predetermined state comprises an offset between the data PI code and the crossing PI code; receiving a data stream; and performing clock and data recovery on the data stream based on the offset between the data PI code and the crossing PI code.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.