Optoelectronics and CMOS integration on GOI substrate
US9362444B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 18, 2015 |
| Grant date | Jun 7, 2016 |
| Priority date | — |
| Expiry date | Mar 18, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01S5/021
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A method of forming an optoelectronic device and a silicon device on a single chip. The method may include; forming a silicon substrate in a first and second region of a single chip; forming a germanium layer above the substrate in at least the first region; forming the optoelectronic device on the germanium layer in the first region, the optoelectronic device has a top cladding layer, a bottom cladding layer, and an active region, the bottom cladding layer is on the semiconductor layer, the active region is adjacent to a waveguide and on the bottom cladding layer, the top cladding layer is on the active region; and forming the silicon device on a silicon layer in the second region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.