Method of forming a memory and method of forming a memory array

US9362498B2 · kind B2 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Klaus Knobloch · Radeberg, DE
• Robert Strenz · Radebeul, DE

Key dates

• Filing date: Aug 27, 2015
• Grant date: Jun 7, 2016
• Expiry date: Aug 27, 2035

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10N70/8833

Abstract

A method of forming a memory includes forming a first electrode and a second electrode within a first layer over a semiconductor substrate, forming a resistive-switching memory element and an antifuse element over the first layer, wherein the resistive-switching memory element includes a metal oxide layer and is electrically contacting the first electrode, wherein the metal oxide layer has a first thickness and a forming voltage that corresponds to the first thickness, wherein the antifuse element includes a dielectric layer and is electrically contacting the second electrode, and wherein the dielectric layer has a second thickness that is less than the first thickness and a dielectric breakdown voltage that is less than the forming voltage, and forming a third electrode and a fourth electrode within a second layer over the resistive-switching memory element and the antifuse element, wherein the third electrode is electrically contacting the resistive-switching memory element and the fourth electrode is electrically contacting the antifuse element.