Patent · US Active

Devices and method for testing power-on reset voltage

US9362904B2 · kind B2 · utility

0Cited by

6References

20Claims

0Family size

Assignee

Freeescale Semiconductor, Inc. · US

Inventors

Chris C. Dao · Pflugerville, US
Stefano Pietri · Austin, US
Juxiang Ren · Austin, US

Key dates

Filing date	Feb 28, 2014
Grant date	Jun 7, 2016
Priority date	—
Expiry date	Jan 3, 2035

Classification

Technology area (CPC G)Physics
CPC primaryG06F1/24
WIPO fieldMeasurement
WIPO sectorInstruments

Abstract

A system having a power on reset circuit including a voltage divide), a multiplexer coupled to two outputs of the voltage divider, a first comparator coupled to the multiplexer and a reference, a logic gate coupled to the first comparator, a second comparator coupled to one of the two outputs of the voltage divider, and an emulation gate coupled to the second comparator.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.