High performance CRC calculation with small footprint
US9362950B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | May 2, 2014 |
| Grant date | Jun 7, 2016 |
| Priority date | — |
| Expiry date | Aug 15, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L1/00
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A cyclic redundancy check (CRC) can be determined with fewer resources within a communication system. A CRC interface component is configured to receive an array of bits as an input via an N-bit data pathway, and receive a CRC previous output from a feedback component coupled to a CRC output, in which N can comprise an integer greater than one. A parallel CRC component can be configured to generate a CRC current output from a plurality of parallel processing pipelines that are configured to concurrently process at least a part of the array of bits and the CRC previous output with a set of parallel CRC logic operations. The set of CRC logic operations can include a masking operation and a parity operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.