Observation of data in persistent memory
US9367472B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 10, 2013 |
| Grant date | Jun 14, 2016 |
| Priority date | — |
| Expiry date | Jun 22, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0868
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Systems and methods for reliably using data storage media. Multiple processors are configured to access a persistent memory. For a given data block corresponding to a write access request from a first processor to the persistent memory, a cache controller prevents any read access of a copy of the given data block in an associated cache. The cache controller prevents any read access while detecting an acknowledgment that the given data block is stored in the persistent memory is not yet received. Until the acknowledgment is received, the cache controller allows write access of the copy of the given data block in the associated cache only for a thread in the first processor that originally sent the write access request. The cache controller invalidates any copy of the given data block in any cache levels below the associated cache.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.