Vertical transistor with air-gap spacer
US9368572B1 · kind B1 · utility
124Cited by
12References
7Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 21, 2015 |
| Grant date | Jun 14, 2016 |
| Priority date | — |
| Expiry date | Nov 21, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/60
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A vertical transistor has a first air-gap spacer between the gate and the bottom source/drain, and a second air-gap spacer between the gate and the contact to the bottom source/drain. A dielectric layer disposed between the gate and the contact to the top source/drain decreases parasitic capacitance and inhibits electrical shorting.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.