Kangguo Cheng
2,819Patents
38h-index
365Co-inventors
93Inventor score
Filing activity: Jun 25, 2003 → Dec 27, 2023
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US8969934B1 | Gate-all-around nanowire MOSFET and method of formation | Electricity | 308 | Active |
| US9842835B1 | High density nanosheet diodes | Electricity | 282 | Active |
| US10229985B1 | Vertical field-effect transistor with uniform bottom spacer | Electricity | 267 | Active |
| US9362355B1 | Nanosheet MOSFET with full-height air-gap spacer | Electricity | 145 | Active |
| US10418277B2 | Air gap spacer formation for nano-scale semiconductor devices | Electricity | 136 | Active |
| US9368572B1 | Vertical transistor with air-gap spacer | Electricity | 124 | Active |
| US7700466B2 | Tunneling effect transistor with self-aligned gate | Emerging Cross-Sectional Technologies | 119 | Active |
| US7811881B2 | Methods for forming semiconductor structures with buried isolation collars and semiconductor structures formed by these methods | Electricity | 112 | Active |
| US9837414B1 | Stacked complementary FETs featuring vertically stacked horizontal nanowires | Electricity | 105 | Active |
| US7993999B2 | High-K/metal gate CMOS finFET with improved pFET threshold voltage | Electricity | 100 | Active |
| US9653289B1 | Fabrication of nano-sheet transistors with different threshold voltages | Electricity | 96 | Active |
| US9608065B1 | Air gap spacer for metal gates | Electricity | 89 | Active |
| US9620590B1 | Nanosheet channel-to-source and drain isolation | Electricity | 86 | Active |
| US9443982B1 | Vertical transistor with air gap spacers | Electricity | 71 | Active |
| US9659963B2 | Contact formation to 3D monolithic stacked FinFETs | Electricity | 70 | Active |
| US9660028B1 | Stacked transistors with different channel widths | Electricity | 69 | Active |
| US9716158B1 | Air gap spacer between contact and gate region | Electricity | 67 | Active |
| US9570551B1 | Replacement III-V or germanium nanowires by unilateral confined epitaxial growth | Electricity | 67 | Active |
| US7560784B2 | Fin PIN diode | Electricity | 63 | Active |
| US9773913B1 | Vertical field effect transistor with wrap around metallic bottom contact to improve contact resistance | Electricity | 62 | Active |
| US10263100B1 | Buffer regions for blocking unwanted diffusion in nanosheet transistors | Electricity | 61 | Active |
| US8569152B1 | Cut-very-last dual-epi flow | Electricity | 59 | Active |
| US8169025B2 | Strained CMOS device, circuit and method of fabrication | Electricity | 57 | Active |
| US8420459B1 | Bulk fin-field effect transistors with well defined isolation | Electricity | 57 | Active |
| US9984936B1 | Methods of forming an isolated nano-sheet transistor device and the resulting device | Electricity | 55 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.