Removal of 3D semiconductor structures by dry etching
US9368672B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 17, 2014 |
| Grant date | Jun 14, 2016 |
| Priority date | — |
| Expiry date | Jun 17, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10H20/0364
Abstract
Various embodiments include methods of fabricating a semiconductor device that include providing a plurality of nanostructures extending away from a support, forming a flowable material layer between the nanostructures, forming a patterned mask over a first portion of the flowable material and the first portion of the plurality of nanostructures, such that a second portion of the flowable material and a second portion of the plurality of nanostructures are not located under the patterned mask and etching the second portion of the flowable material and the second portion of the plurality of nanostructures to remove the second portion of the flowable material and the second portion of the plurality of nanostructures to leave the first portion of the flowable material and the first portion of the plurality of nanostructures unetched.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.