Silicon etching method
US9371224B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 3, 2013 |
| Grant date | Jun 21, 2016 |
| Priority date | — |
| Expiry date | Sep 3, 2033 |
Classification
- Technology area (CPC B)Performing Operations; Transporting
- CPC primaryB81C2201/0132
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
A silicon etching method of etching a silicon substrate to form silicon trenches having different width dimensions includes: S1, providing a silicon substrate; S2, depositing a mask layer on the silicon substrate; S3, corroding the mask layer to form windows having different width dimensions, wherein a mask layer having a certain thickness is reserved at least at a bottom portion of a window having a non-minimum width dimension, such that all the silicon trenches have the same depth after step S4; and S4, corroding the mask layer at the bottom portion of the window and the silicon substrate to form the silicon trenches. The mask layer having a certain thickness is reserved at the bottom portion of the window having the non-minimum width dimension, a relatively large window is protected, and a relatively small window is etched first, so that the finally obtained silicon trenches have the same depth.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.