System, method and apparatus for preventing data loss due to memory defects using latches
US9372629B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 9, 2014 |
| Grant date | Jun 21, 2016 |
| Priority date | — |
| Expiry date | Dec 9, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/0409
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system and method for operating a memory system includes receiving a first user data, writing the first user data to a first buffer, writing the first user data from the first buffer to a first selected memory location, writing the first user data from the first buffer into a second buffer when the first user data was successfully written to the first selected memory location. Data is retrieved from the first selected memory location and written into the first buffer. Data in the first buffer can be matched to the user data in the second buffer to confirm a successful storage of the first user data in the memory system. A previously stored user data can be retrieved from a third selected memory location and written into a third buffer when the previously stored user data was stored in the memory system before the first user data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.