Patent · US Active

Microprocessor with compressed and uncompressed microcode memories

US9372696B2 · kind B2 · utility

2Cited by

10References

19Claims

0Family size

Assignee

VIA Technologies, Inc. · TW

Inventors

G. Glenn Henry · Austin, US
Terry Parks · Austin, US
Brent Bean · Austin, US

Key dates

Filing date	Nov 25, 2013
Grant date	Jun 21, 2016
Priority date	—
Expiry date	Nov 11, 2034

Classification

Technology area (CPC G)Physics
CPC primaryG06F9/3891
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A microprocessor includes a plurality of memories each configured to hold microcode instructions. At least a first of the plurality of memories is configured to provide M-bit wide words of compressed microcode instructions, and at least a second of the plurality of memories is configured to provide N-bit wide words of uncompressed microcode instructions. M and N are integers greater than zero and N is greater than M. The microprocessor also includes a decompression unit configured to decompress the compressed microcode instructions after being fetched from the at least a first of the plurality of memories and before being executed.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.