Interruption of chip component managing tasks
US9372717B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 8, 2014 |
| Grant date | Jun 21, 2016 |
| Priority date | — |
| Expiry date | Aug 28, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/5038
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Embodiments include an apparatus comprising a processor and a computer readable storage medium having computer usable program code. The computer usable program code can be configured to determine whether priority of a requested task is higher than a priority of a currently executing task. The computer usable program code can be further configured to determine whether a value indicates that the currently executing task can be interrupted. The computer usable program code can be configured to trigger execution of the requested task on the processor, if the value indicates that the currently executed task can be interrupted. The computer usable program code can be further configured to wait for lapse of a time period and, interrupt the currently executing task upon detection of lapse of the time period or detection of a change to the value, if the value indicates that the currently executing task cannot be interrupted.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.