Semiconductor device, manufacturing method and stacking structure thereof
US9373564B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 6, 2015 |
| Grant date | Jun 21, 2016 |
| Priority date | — |
| Expiry date | Mar 6, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes a substrate, a redistribution layer, a plurality of through-silicon vias (TSVs), and a plating seed layer. The substrate has a first surface and a second surface opposite to each other, and a plurality of cavities. The redistribution layer is disposed on the first surface, and the TSVs are respectively disposed in the cavities. The plating seed layer is disposed between the inner wall of each of the cavities and the corresponding TSVs. The anti-oxidation layer is disposed between the plating seed layer and the corresponding TSVs. The buffer layer covers the first surface and exposes the redistribution layers. Furthermore, a manufacturing method and a stacking structure of the semiconductor device are also provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.