Patent · US Active

Interruption of chip component managing tasks

US9378048B2 · kind B2 · utility

0Cited by

4References

6Claims

0Family size

Assignee

International Business Machines Corporation · US

Inventors

Bishop Brock · Coupland, US
Tilman Gloekler · Schrobenhausen, DE
Andreas C. Koenig · Rockford, US
Cedric Lichtenau · Stuttgart, DE
Preetham M. Lobo · Bengaluru, IN

Key dates

Filing date	Jun 11, 2014
Grant date	Jun 28, 2016
Priority date	—
Expiry date	Sep 24, 2034

Classification

Technology area (CPC G)Physics
CPC primaryG06F9/5038
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

Embodiments include receiving, at a microcontroller of a chip, a request to execute a first task having a first priority. Embodiments further include determining that a second task having a second priority is currently executing. Embodiments further include determining that the first priority is higher than the second priority. Embodiments further include determining whether a value in a register indicates that the second task can be interrupted. If it is determined that the second task can be interrupted, embodiments further include triggering execution of the second task. If it is determined that the second task cannot be interrupted, embodiments further include waiting for lapse of a time period since receipt of the request to execute the first task, and interrupting the second task upon detecting lapse of the time period, or detecting, prior to the lapse of the time period, that the second task can be interrupted.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.