Power and ground routing of integrated circuit devices with improved IR drop and chip performance
US9379059B2 · kind B2 · utility
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6Claims
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Key dates
| Filing date | Nov 1, 2011 |
| Grant date | Jun 28, 2016 |
| Priority date | — |
| Expiry date | Oct 1, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/14
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An integrated circuit chip includes a semiconductor substrate having thereon a plurality of IMD layers and a plurality of first conductive layers; a first passivation layer overlying the plurality of IMD layers and the first conductive layers; at least a first power/ground mesh wiring line in a first aluminum layer overlying the first Insulating layer; and at least a second power/ground mesh wiring line in a second aluminum layer overlying the first aluminum layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.