Metal contact for semiconductor device
US9379077B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 30, 2013 |
| Grant date | Jun 28, 2016 |
| Priority date | — |
| Expiry date | Oct 30, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3841
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device package and packaging method, the semiconductor device packaging method comprising: providing a chip with a bonding pad formed on the chip surface; forming a passivation layer and a bump on the chip surface, wherein the passivation layer has an opening exposing part of the pad, the bump is located in the opening and the size of the bump is less than the size of the opening; forming a solder ball covering the top surface and the side wall of the bump, and the bottom surface of the opening. The formed semiconductor device package is not easy to form a short circuit. The bonding strength between the solder ball and the bump is high and the performance of the semiconductor device is stable.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.