Multi-level redundancy code for non-volatile memory controller
US9384128B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 18, 2014 |
| Grant date | Jul 5, 2016 |
| Priority date | — |
| Expiry date | Jul 1, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/1102
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
In the controller circuit of a non-volatile memory system, data is protected by CRC (cyclic redundancy code) between functional blocks of the controller: Before a data set is transmitted from one functional block (such the host interface) to another functional block (such as data encryption or ECC), corresponding CRC is generated and transferred with the data. At the second block, the data set can be checked with the CRC at the second block before it operates on the data. This allows the controller to check for internal transfer errors early, allow for corrupted data to be re-requested, such as from a host when this process is applied to a data write operation. After the second block finishes with the data, a new CRC can then be generated to protect the data on its next internal transfer. This arrangement can particularly useful for functional blocks that transform the data set.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.