Memory device
US9384829B2 · kind B2 · utility
1Cited by
4References
8Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 20, 2013 |
| Grant date | Jul 5, 2016 |
| Priority date | — |
| Expiry date | Jul 21, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B63/84
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory device includes n (n being an integer of 2 or more) resistance change films being series connected to each other. Each of the resistance change films is a superlattice film in which plural pairs of a first crystal layer made of a first compound and a second crystal layer made of a second compound are alternately stacked. An average composition of the entire resistance change film or an arrangement pitch of the first crystal layers and the second crystal layers are mutually different among the n resistance change films.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.