Offset calibration for low power and high performance receiver
US9385695B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 6, 2014 |
| Grant date | Jul 5, 2016 |
| Priority date | — |
| Expiry date | Jul 5, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/03057
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Systems and methods for providing offset calibration for low power and high performance receivers are described herein. In one embodiment, a method for offset calibration comprises inputting a first voltage to a first input of a sample latch, and inputting a second voltage and an offset-cancellation voltage to a second input of the sample latch. The method also comprises adjusting the offset-cancellation voltage, observing an output of the sample latch as the offset-cancellation voltage is adjusted, and recording a value of the offset-cancellation voltage at which a metastable state is observed at the output of the sample latch. The method may be performed for each one of a plurality of different voltage levels for the first voltage to determine an offset-cancellation voltage for each one of the voltage levels.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.