Air-gap forming techniques for interconnect structures
US9390965B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 20, 2013 |
| Grant date | Jul 12, 2016 |
| Priority date | — |
| Expiry date | Jul 24, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An interconnect structure includes a first low-k dielectric layer formed over a substrate. A first metal line is disposed in the first low-k dielectric layer. The first metal line includes a first conductive body with a first width and an up landing pad with a second width. The first width is smaller than the second width. The interconnect structure further includes a first air-gap adjacent to sidewalls of the first conductive body. The interconnect structure also includes a second low-k dielectric layer formed over the first low-k dielectric layer and a first via in the second low-k dielectric layer and disposed on the up landing pad.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.