Method of forming epitaxial buffer layer for finFET source and drain junction leakage reduction
US9390976B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Jan 30, 2015 |
| Grant date | Jul 12, 2016 |
| Priority date | — |
| Expiry date | Jan 30, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/832
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming a semiconductor device that includes forming a fin structure, and forming an undoped epitaxial semiconductor material on the fin structure. A first portion of undoped epitaxial semiconductor material is formed on the sidewall of at least one of a source region portion and a drain region portion of the fin structure. A second portion of the undoped epitaxial semiconductor material is formed on the recessed surface of a bulk semiconductor substrate that is present at the base of the fin structure. The method further includes forming a doped epitaxial semiconductor material on the undoped epitaxial semiconductor material. The undoped epitaxial semiconductor material and the doped epitaxial semiconductor material provide a source region and drain region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.