Semiconductor border protection sealant
US9390993B2 · kind B2 · utility
1Cited by
4References
31Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 20, 2014 |
| Grant date | Jul 12, 2016 |
| Priority date | — |
| Expiry date | Oct 20, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor package includes a semiconductor unit containing an active circuitry layer. The semiconductor package also includes a plurality of bonding pads on the active circuitry layer, which are configured to be connected to corresponding external conductive connectors. The semiconductor package also includes a protective sealant coating filling grooved edges of the active circuitry layer. The protective sealant coating contains an exterior wafer-singulated surface.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.