Error correcting code scheme utilizing reserved space
US9391637B2 · kind B2 · utility
2Cited by
3References
15Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 30, 2012 |
| Grant date | Jul 12, 2016 |
| Priority date | — |
| Expiry date | Apr 4, 2032 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods, techniques, systems and apparatuses for utilizing reserved space for error correcting functionality. A cache line (“reserved line”) in a plurality of cache lines to store error correcting code (ECC) data is utilized for storing ECC data corresponding to other cache lines within the plurality of cache lines when a memory device has failed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.