Multi-addressable register files and format conversions associated therewith
US9395981B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 17, 2012 |
| Grant date | Jul 19, 2016 |
| Priority date | — |
| Expiry date | Aug 31, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/30185
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A multi-addressable register file is addressed by a plurality of types of instructions, including scalar, vector and vector-scalar extension instructions. It may be determined that data is to be translated from one format to another format. If so determined, a convert machine instruction is executed that obtains a single precision datum in a first representation in a first format from a first register; converts the single precision datum of the first representation in the first format to a converted single precision datum of a second representation in a second format; and places the converted single precision datum in a second register.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.