Regulating voltage responsive to the shortest aggregate distance to the installed memory modules
US9396768B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 4, 2014 |
| Grant date | Jul 19, 2016 |
| Priority date | — |
| Expiry date | Sep 4, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C5/04
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method includes regulating voltage to a memory system responsive to a voltage signal received at a voltage feedback line, wherein the memory system includes a plurality of voltage sense line pairs in different locations within the memory system. The method further includes identifying a location of each of a plurality of installed memory modules present in the memory system. Still further, the method includes identifying a voltage sense line pair that provides a shortest aggregate distance to each of the installed memory modules, and then regulating voltage to the memory system responsive to the identified voltage sense line pair.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.