Semiconductor device
US9396773B2 · kind B2 · utility
0Cited by
15References
18Claims
0Family size
Assignee
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Key dates
| Filing date | Oct 22, 2014 |
| Grant date | Jul 19, 2016 |
| Priority date | — |
| Expiry date | Oct 22, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/005
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes a first cell array region disposed adjacent to a second cell array region; a dummy cell region disposed between the first cell array region and the second cell array region, and configured to distinguish the first cell array region from the second cell array region by dummy bit lines; first group segment input/output lines disposed to correspond to the first cell array region when viewed in terms of the dummy bit lines; and second group segment input/output lines disposed to correspond to the second cell array region when viewed in terms of the dummy bit lines.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.