Sacrificial pad on semiconductor package device and method
US9397027B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 24, 2014 |
| Grant date | Jul 19, 2016 |
| Priority date | — |
| Expiry date | Sep 24, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3025
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor package device, electronic device, and fabrication methods are described that include at least one sacrificial contact pad as a portion of the semiconductor package device for preventing and reducing stress on the semiconductor package device and increasing board level reliability. In implementations, the semiconductor package device includes a lead frame substrate including at least one lead frame contact pad and at least one sacrificial contact pad, an integrated circuit device electrically coupled to the lead frame substrate, and an encapsulation layer that encapsulates the lead frame substrate and the integrated circuit device. In implementations, one process for fabricating the semiconductor package device includes placing an integrated circuit device on a lead frame substrate, where the lead frame substrate includes at least one lead frame contact pad and at least one sacrificial contact pad, and encapsulating the integrated circuit device and the lead frame substrate with an encapsulation layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.