Inventor · San Jose, CA, US

Kumar Nagarajan

28Patents
7h-index
46Co-inventors
69Inventor score

Filing activity: May 27, 1999 → Jan 24, 2022

Most-cited inventions

PatentTitleAreaCited byStatus
US6133064A Flip chip ball grid array package with laminated substrate Electricity 54 Expired
US6441499B1 Thin form factor flip chip ball grid array Electricity 16 Expired
US7791192B1 Circuit for and method of implementing a capacitor in an integrated circuit Electricity 15 Expired
US6519844B1 Overmold integrated circuit package Emerging Cross-Sectional Technologies 14 Expired
US6320127A Method and structure for reducing the incidence of voiding in an underfill layer of an electronic component package Electricity 11 Expired
US9136258B1 Stacked LED for optical sensor devices Electricity 11 Active
US7187077B1 Integrated circuit having a lid and method of employing a lid on an integrated circuit Electricity 10 Expired
US6639321B1 Balanced coefficient of thermal expansion for flip chip ball grid array Electricity 6 Expired
US8258013B1 Integrated circuit assembly having vented heat-spreader Electricity 6 Active
US6963129B1 Multi-chip package having a contiguous heat spreader assembly Electricity 5 Expired
US8841752B1 Semiconductor structure and method for interconnection of integrated circuits Electricity 5 Active
US8519528B1 Semiconductor structure and method for interconnection of integrated circuits Electricity 5 Active
US7190082B2 Low stress flip-chip package for low-K silicon technology Electricity 4 Expired
US9354111B2 Wafer level lens in package Physics 4 Active
US8084297B1 Method of implementing a capacitor in an integrated circuit Electricity 4 Active
US8810028B1 Integrated circuit packaging devices and methods Electricity 3 Active
US6911736B2 Electrostatic discharge protection Electricity 2 Expired
US9397027B1 Sacrificial pad on semiconductor package device and method Electricity 2 Active
US7473583B1 Integrated circuit having a lid and method of employing a lid on an integrated circuit Electricity 2 Active
US8410604B2 Lead-free structures in a semiconductor device Electricity 1 Active
US6943446B2 Via construction for structural support Electricity 1 Expired
US9627573B2 Optical sensor having a light emitter and a photodetector assembly directly mounted to a transparent substrate Electricity 1 Active
US6806119B2 Method of balanced coefficient of thermal expansion for flip chip ball grid array Electricity 1 Expired
US9443815B2 Embedded die redistribution layers for active device Electricity 1 Active
US12315853B2 System packaging for cellular modem and transceiver system of heterogeneous stacking Electricity 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.