Thin film transistor
US9397220B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 24, 2014 |
| Grant date | Jul 19, 2016 |
| Priority date | — |
| Expiry date | Oct 29, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/6757
Abstract
A thin film transistor disposed on a substrate is provided. The thin film transistor includes a channel, a gate, a source, a drain and an etching stop layer. The channel is disposed above the substrate and is located between the etching stop layer and the source. The gate is disposed on the substrate and overlapped with the channel. The source is disposed between the channel and the substrate and electrically connected to the channel. The channel is disposed between the drain and the substrate. The etching stop layer is disposed between the drain and the channel and has a first through hole exposing a portion of the channel. The drain is filled in the first through hole of the etching stop layer and is electrically connected to the channel. The drain covers the channel completely.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.