Dual layer stack for contact formation
US9401336B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 4, 2014 |
| Grant date | Jul 26, 2016 |
| Priority date | — |
| Expiry date | Nov 4, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/381
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor structures includes a contact fabricated utilizing a multi material trench-layer. The multi material trench layer is utilized to form a contact trench and the contact trench is utilized to form the contact therein. The trench-layer includes a lower barrier trench layer and an upper photoprocessing layer. The photoprocessing layer is utilized pattern and form contact trench. The barrier layer protects an electroplating conductive layer utilized in forming the contact from corrosion that may occur during the removal of the photoprocessing layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.