Semiconductor device
US9401359B2 · kind B2 · utility
3Cited by
4References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 25, 2014 |
| Grant date | Jul 26, 2016 |
| Priority date | — |
| Expiry date | Nov 25, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/66
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of manufacturing a semiconductor device includes forming a gate structure through a first insulating interlayer on a substrate such that the gate structure includes a spacer on a sidewall thereof, forming a first hard mask on the gate structure, partially removing the first insulating interlayer using the first hard mask as an etching mask to form a first contact hole such that the first contact hole exposes a top surface of the substrate, forming a metal silicide pattern on the top surface of the substrate exposed by the first contact hole, and forming a plug electrically connected to the metal silicide pattern.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.