Dual mode low-dropout linear regulator
US9405309B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 29, 2014 |
| Grant date | Aug 2, 2016 |
| Priority date | — |
| Expiry date | Nov 29, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG05F1/575
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
In one example, a method includes operating an LDO regulator system in one of a voltage regulation mode or a power balancing mode. The method further includes comparing one or more respective reference voltages to one or more respective feedback voltages to determine a change in amount of current that needs to be delivered by the LDO regulator system, wherein a first reference voltage is across a reference resistor and a first feedback voltage is across a shunt resistor, and in response to the change in the amount of current that needs to be delivered by the LDO regulator system, adjusting an amount of current flowing through a transistor to maintain a load at a constant output voltage level. Circuits and systems that implement the method are also described.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.