Code versioning for enabling transactional memory promotion
US9405596B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 2, 2014 |
| Grant date | Aug 2, 2016 |
| Priority date | — |
| Expiry date | Dec 11, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F8/452
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Code versioning for enabling transactional memory region promotion may include receiving a portion of candidate source code; outlining the portion of candidate source code received for parallel execution; wrapping a critical region with entry and exit routines to enter into a speculation sub-process, wherein the entry and exit routines also gather conflict statistics at run time; and generating an outlined code portion comprising multiple loop versions using a processor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.