Cache modeling using random sampling and a timestamp histogram
US9405695B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 5, 2013 |
| Grant date | Aug 2, 2016 |
| Priority date | — |
| Expiry date | Feb 3, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/601
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system and method for determining an optimal cache size of a computing system is provided. In some embodiments, the method comprises selecting a portion of an address space of a memory structure of the computing system. A workload of data transactions is monitored to identify a transaction of the workload directed to the portion of the address space. An effect of the transaction on a cache of the computing system is determined, and, based on the determined effect of the transaction, an optimal cache size satisfying a performance target is determined. In one such embodiment the determining of the effect of the transaction on a cache of the computing system includes determining whether the effect would include a cache hit for a first cache size and determining whether the effect would include a cache hit for a second cache size different from the first cache size.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.