Semiconductor wafer structure
US9406499B2 · kind B2 · utility
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20Claims
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Assignee
Inventors
Key dates
| Filing date | Feb 12, 2014 |
| Grant date | Aug 2, 2016 |
| Priority date | — |
| Expiry date | Feb 12, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/07025
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor structure includes a wafer including a first surface and a periphery, a plurality of protrusions protruded from the first surface and a plurality of recesses spaced from each other by the plurality of protrusions, and each of the plurality of recesses is extended from the periphery of the wafer and is elongated across the first surface of the wafer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.