Method for manufacturing MTJ memory device
US9406876B2 · kind B2 · utility
97Cited by
100References
21Claims
0Family size
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Key dates
| Filing date | Feb 11, 2016 |
| Grant date | Aug 2, 2016 |
| Priority date | — |
| Expiry date | Feb 11, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N50/85
Abstract
A method for manufacturing MTJ pillars for a MTJ memory device. The method includes depositing multiple MTJ layers on a substrate, depositing a hard mask on the substrate and coating a photoresist on the hard mask. Further, alternating steps of reactive ion etching and ion beam etching are performed to isolate MTJ pillars and expose side surfaces of the MTJ layers. An insulating layer is the applied to protect the side surfaces of the MTJ layers. A second insulating layer is deposited before the device is planarized using chemical mechanical polishing.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.