Programmable single-supply level-shifter circuit
US9407266B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 22, 2014 |
| Grant date | Aug 2, 2016 |
| Priority date | — |
| Expiry date | Oct 17, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/0185
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
In an example implementation, a level-shifter circuit in an integrated circuit (IC) includes a plurality field-effect transistors (FETs) coupled to provide: a first inverter having an input port configured to receive an input signal having a first supply voltage, an output port, and a bias port; a second inverter having an input port coupled to the output port of the first inverter, an output port, and a bias port coupled to a second supply voltage; a diode-connected FET coupled between the second supply voltage and the bias port of the first inverter; a first FET in parallel with the diode-connected FET having a gate coupled to the output of the second inverter; and a second FET in parallel with the diode-connected FET and the first FET having a gate configured to receive a mode select signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.