Method and apparatus for securely saving and restoring the state of a computing platform
US9407636B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 19, 2014 |
| Grant date | Aug 2, 2016 |
| Priority date | — |
| Expiry date | May 19, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L63/0876
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus and method for securely suspending and resuming the state of a processor. For example, one embodiment of a method comprises: generating a data structure including at least the monotonic counter value; generating a message authentication code (MAC) over the data structure using a first key; securely providing the data structure and the MAC to a module executed on the processor; the module verifying the MAC, comparing the monotonic counter value with a counter value stored during a previous suspend operation and, if the counter values match, then loading processor state required for the resume operation to complete. Another embodiment of a method comprises: generating a first key by a processor; securely sharing the first key with an off-processor component; and using the first key to generate a pairing ID usable to identify a pairing between the processor and the off-processor component.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.