Inventor · Ramat HaSharon, IL

Ittai Anati

72Patents
11h-index
124Co-inventors
81Inventor score

Filing activity: Feb 14, 2000 → Oct 9, 2023

Most-cited inventions

PatentTitleAreaCited byStatus
US7451333B2 Coordinating idle state transitions in multi-core processors Emerging Cross-Sectional Technologies 79 Expired
US7430656B2 System and method of converting data formats and communicating between execution units Physics 60 Expired
US9710401B2 Processors, methods, systems, and instructions to support live migration of protected containers Physics 21 Active
US7757103B2 Method and apparatus to estimate energy consumed by central processing unit core Emerging Cross-Sectional Technologies 17 Active
US9448950B2 Using authenticated manifests to enable external certification of multi-processor platforms Physics 16 Active
US6920546B2 Fusion of processor micro-operations Physics 16 Expired
US8762694B1 Programmable event-driven yield mechanism Physics 16 Expired
US9767044B2 Secure memory repartitioning Physics 13 Active
US10558588B2 Processors, methods, systems, and instructions to support live migration of protected containers Physics 13 Active
US7849465B2 Programmable event driven yield mechanism which may activate service threads Physics 12 Active
US6647545B1 Method and apparatus for branch trace message scheme Physics 12 Expired
US8082430B2 Representing a plurality of instructions with a fewer number of micro-operations Physics 11 Expired
US9747102B2 Memory management in secure enclaves Physics 11 Active
US9407636B2 Method and apparatus for securely saving and restoring the state of a computing platform Electricity 11 Active
US8301868B2 System to profile and optimize user software in a managed run-time environment Physics 11 Expired
US9355262B2 Modifying memory permissions in a secure processing environment Physics 11 Active
US9323686B2 Paging in secure enclaves Physics 10 Active
US9875189B2 Supporting secure memory intent Emerging Cross-Sectional Technologies 8 Active
US9990314B2 Instructions and logic to interrupt and resume paging in a secure enclave page cache Physics 8 Active
US8468365B2 Tweakable encryption mode for memory encryption with protection against replay attacks Physics 8 Active
US9076019B2 Method and apparatus for memory encryption with integrity check and protection against replay attacks Electricity 7 Active
US7020789B2 Processor core and methods to reduce power by not using components dedicated to wide operands when a micro-instruction has narrow operands Emerging Cross-Sectional Technologies 5 Expired
US11055236B2 Processors, methods, systems, and instructions to support live migration of protected containers Physics 4 Active
US9703733B2 Instructions and logic to interrupt and resume paging in a secure enclave page cache Physics 4 Active
US10282306B2 Supporting secure memory intent Emerging Cross-Sectional Technologies 4 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.