Integrated circuit assembly and method of making
US9412644B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 16, 2014 |
| Grant date | Aug 9, 2016 |
| Priority date | — |
| Expiry date | Dec 16, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/85
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A first wafer is provided that includes an insulating layer, a first active layer, and a handle layer. The insulating layer has a first surface and a second surface. The first active layer contacts the first surface of the insulating layer. The handle layer contacts the second surface of the insulating layer. A second wafer is provided that includes a substrate and a second active layer. The substrate has a first surface and a second surface. The second active layer contacts the first surface of the substrate. The second wafer is bonded to the first wafer by physically connecting the first active layer to the second surface of the substrate. The handle layer is removed. A metal bond pad is formed on the second surface of the insulating layer. The metal bond pad is electrically connected to the first active layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.