Semiconductor packaging structure and method
US9412689B2 · kind B2 · utility
4Cited by
2References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 24, 2012 |
| Grant date | Aug 9, 2016 |
| Priority date | — |
| Expiry date | Jan 24, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/20642
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A system and method for packaging semiconductor dies is provided. An embodiment comprises a first package with a first contact and a second contact. A post-contact material is formed on the first contact in order to adjust the height of a joint between the contact pad a conductive bump. In another embodiment a conductive pillar is utilized to control the height of the joint between the contact pad and external connections.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.